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Title: Digital display circuit displayable in analog fashion



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Claims:
Claims:
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1. A digital display circuit for indicating an analog signal voltage comprising:

means for generating a plurality of reference voltages quantized at a predetermined voltage width;

first modulating means for periodically modulating said analog signal so that the modulated analog signal in one period may have a section where the amplitude continuously varies as time advanced;

second modulating means for periodically modulating every each of the reference voltages in synchronization with said first modulating means so that each of the modulated reference voltages may alternatively have two amplitudes of a higher level and a lower level, the voltage difference between said higher and lower levels being substantially equal to the difference between the highest and lowest reference voltages;

a plurality of comparators corresponding to each of said plurality of reference voltages for comparing said modulated analog signal voltage with each of said modulated reference voltages and for producing outputs in accordance with the respective compared results;

selecting means connected to said comparators and having output terminals equal in number to said comparators for generating a drive signal at only one of said output terminals, which is fixed in the relation between the modulated analog signal voltage and the modulated reference voltages;

a pair of display means each consisting of display elements which are connected to respective output terminals of said selecting means and successively arranged in such a sequence that the order in arrangement of the display element sequence in respective one of said display means pair corresponds to that in amplitude of the reference voltages, and also the element corresponding to the highest reference voltage in one of said display means pair being positioned adjacent to the element corresponding to the lowest reference voltage in the order of said display means pair; and

driving means for alternately rendering said pair of display means operative so that said one of the display means pair may be operative while said modulated reference voltages are in the lower level and said the other of the display means pair may be operative while said modulated reference voltages are in the higher level,

one of said display elements which is associated with said drive-signal generated output terminal of the selecting means and also with said operative display means being energized.



2. A digital display circuit according to claim 1, wherein the amplitude width in said section of the modulated analog signal is substantially half the predetermined width of the quantized reference voltages.

3. A digital display circuit according to claim 1, wherein said modulated analog signal is in a sawtooth waveform.

4. A digital display circuit according to claim 3 including a constant current circuit (A3, Ra, Tr2) for flowing through a resistor (Rb) a current corresponding to said analog signal voltage (Vin2), a capacitor (C40) series-connected to a constant current source (I30) so as to be charged with a constant current, a switching element (Tr70) parallel-connected to said capacitor, an oscillator (30) for generating a pulse for periodically turning on said switching element for a short time, a shunt circuit (A5, Tr30, Rc) connected to said constant current circuit so as to subtract from the current of said constant current circuit a current corresponding to the voltage charged into said capacitor (C40), and a voltage follower circuit (A4) connected to each of said comparators so as to put out the same voltage as the voltage produced across said resistor (Rb) and to apply it as the analog input voltage to one of the inputs of each of said comparator, whereby in the OFF state of said switching element (Tr70), said capacitor (C40) is charged and the output voltage of said voltage follower circuit is decreased in accordance with the charging voltage of said capacitor, and in the ON state of said switching element, said capacitor is discharged and the output voltage of said voltage follower circuit is restored to its initial potential.

5. A digital display circuit for indicating an analog signal voltage comprising:

means for generating a plurality of reference voltages quantized at a predetermined voltage width;

first modulating means for periodically modulating said analog signal so that the modulated signal may alternately have two amplitudes of a higher level and a lower level, the voltage difference between the higher and lower levels being substantially equal to the difference between the highest and lowest reference voltages;

second modulating means for periodically modulating every each of the reference voltages in synchronization with said first modulating means so that each of the modulated reference voltages may have a section where the amplitude varies as time advanced;

a plurality of comparators corresponding to each of said plurality of reference voltages for comparing said modulated analog signal voltage with each of said modulated reference voltages and for producing outputs in accordance with the respective compared results;

selecting means connected to said comparators and having output terminals equal in number to said comparators for generating a drive signal at only one of said output terminals, which is fixed in the relation between the modulated analog signal voltage and the modulated reference voltages;

a pair of display means each consisting of display elements which are connected to respective output terminals of said selecting means and successively arranged in such a sequence that the order in arrangement of the display element sequence in respective one of said display means pair corresponds to that in amplitude of the reference voltages, and also the element corresponding to the highest reference voltage in one of said display means pair being positioned adjacent to the element corresponding to the lowest reference voltage in the other of said display means pair; and

driving means for alternately rendering said pair of display means operative so that said one of the display means pair may be operative while said modulated analog signal is in the lower level and said the other of the display means pair may be operative while said modulated analog signal is in the higher level,

one of said display elements which is associated with said drive-signal generated output terminal of the selecting means and also with said operative display means being energized.



6. A parallel comparison type analog-to-digital converter for performing a parallel comparison of an analog input voltage with a plurality of digitalizing voltages by means of a plurality of comparators to convert the analog input voltage into a digitalized output, comprising:

control means having first and second control states occuring alternatively for permitting said plurality of comparators to perform a comparison of the analog input voltage in a first voltage range when said control means is in the first control state and for permitting said plurality of comparators to perform a comparison of the analog input voltage in a second voltage range when said control means is in the second control state, said control means comprising an oscillator circuit for operating switch means alternately to switch between the first and second control states and periodically to oscillate one set of the input voltages to said plurality of comparators with an amplitude substantially equal to the difference between the highest and lowest values of the digitalizing voltages, the oscillations being in synchronism with the switching between the first and second control states;

said oscillator circuit further comprising means for oscillating another set of the input voltages to said plurality of comparators with an amplitude smaller than the unit digitalizing voltage so that the oscillated another set of the input voltage in one cycle may have a section where the amplitude varies as time advanced, and with cycles different from the switching cycles of the first and second control states but in synchronism with the switching of the first and second control states;

first display means for displaying the outputs from said comparators;

second display means for displaying the outputs fram said comparators; and

means for operating said first display means in the first control state and operating said second display means in the second control state.



7. A parallel comparison type analog-to-digital converter according to claim 6, wherein said oscillated another set of the input voltages is in a sawtooth waveform.


Other info:


Inventors: Maida, Osamu (Tokyo, JP)

Application Number: 06/176579
Filing Date: 1980-08-08
Publication_date: 1982-12-21
Assignee: NIPPON KOGAKU KK

Primary Class(es): 341/159 396/295, 396/289
Other Classes: G01R13/02; G01R19/257; H03M1/00; G01R13/00; G01R19/25; H03K13/175
US Patent Ref:
3275871September, 1966Yiotis340/753Display apparatus
3302040January, 1967Dryden328/183Linear sawtooth voltage-wave generator employing transistor timing circuit having capacitor-zener di
3440637April, 1969Molnar et al.340/753SOLID STATE DISPLAY WITH ELECTRONIC DRIVE CIRCUITRY INCLUDING FEEDBACK CONTROL
3653029March, 1972Kuhlmann340/347ADANALOGUE TO DIGITAL CONVERTER
3656152April, 1972Gundersen340/347ADIMPROVED A-D/D-A CONVERTER SYSTEM
3723762March, 1973Nakaya328/184SAW-TOOTH WAVE GENERATORS
3838413September, 1974Wehrmann328/59CIRCUIT ARRANGEMENT FOR ANALOG-TO-DIGITAL CONVERSION OF MAGNITUDES OR SIGNALS IN ELECTRICAL FORM
3877022April, 1975Lehman et al.340/347ADEnhancing resolution in analog-to-digital conversion by adding statistically controlled noise to the analog input signal
3879724April, 1975McDonald340/347ADIntegrating analog to digital converter
3914758October, 1975Ingle340/756Digital readout for displaying both long term and short term average values of a signal
3949170April, 1976Shionoya340/347ADSignal transmitting system including A-D and D-A converters
3976869August, 1976Stella et al.364/730Solid state resolver coordinate converter unit
3990799November, 1976Nanba et al.354/60LDigital exposure meter
4074292February, 1978Nakamoto et al.354/60LSystem for indicating photographic information

Other Refs:
Primary Examiner: Sloyan, Thomas J.
Assistant Examiner:
Attorney: Fitzpatrick, Cella, Harper & Scinto
Parent Case Data:

This is a division of application Ser. No. 907,210, filed May 18, 1978 abandoned.