Title: Hardware virtualizer for supporting recursive virtual computer systems on a host computer system

Do you think this is a good invention? Vote now:

Votes so far: For:(0) Against:(0)
Claims: What is claimed is:

1. In a computer system including a general purpose host computer, including software and a .phi. map, and having typical real resources such as a central processing unit, for executing instructions as to processes of a user program, and a main memory, and at least one virtual computer having virtual resources, the virtual computer and virtual resources being simulated duplicates of the host computer and real resources, respectively, the host computer also including an individual virtual machine monitor for controlling each virtual computer, the combination of the host computer and each virtual computer being mapped at levels of operation, each level of the virtual computers having virtual resources and successively higher levels of the combination being identified by a number (n+1) to 0, the levels (n+1) through n to level 1 being virtual operating levels of the virtual computers, n being any decimal integer greater than 0, and the 0 level being the real operating level of the host computer having real resources, wherein the instructions of the user program are mapped to real resources, apparatus in which the host computer further includes a hardware virtualizer comprising:

(a) register means for controlling access to the individual virtual operating levels (n+1) through n to level 1;

(b) means invisible to all software of the virtual machine and responsive to said register means for mapping the (n+1)th virtual resources of said (n+1)th level into the nth level and into succeedingly sequentially higher levels to and including level 1, for establishing a relationship between the virtual resource of adjacent levels of the virtual machine;

(c) means visible at least to privileged software of the virtual machine for indicating a correspondence between selected ones of said processes and selected ones of said real resources only from level 1 to the 0 level of operations; and

(d) means responsive to said register means, said mapping means and said indicating means for establishing a correspondence between said real resources at said 0 level of operation and said virtual resources at said level 1 of operation.

2. The apparatus of claim 1 wherein said register means includes means for identifying said virtual operating levels, said identifying means including virtual machine level identifiers, each identifier having a number of syllables corresponding to the respective number of the virtual operating level and wherein said register means also includes means for removing syllables from said identifiers for incrementing the level denoted by the identifier.

3. The apparatus of claim 1 wherein said mapping means includes an inter-level f-map, said correspondence-indicating means includes an intra-level .phi.-map, and said correspondence-establishing means includes composer means for combining said f-map and said .phi.-map.

4. The apparatus of claim 1 wherein said host computer also includes a virtual machine monitor operating at said 0 level, and wherein said apparatus also includes means for generating a first signal when said mapping means fails to map a virtual resource at a given level into the next higher virtual level and for transmitting said first signal directly to the virtual machine monitor controlling said next higher virtual level without the knowledge of the virtual machine monitor operating at said 0 level.

5. The apparatus of claim 4 also including means for generating a second signal when said correspondence-establishing means fails to establish correspondence between a virtual resource at said level 1 and a real resource at level 0 and for transmitting said second signal to said virtual machine monitor operating at the 0 level without the knowledge of any said virtual machine monitor controlling a virtual level.
Other info:

Inventors: Goldberg, Robert P. (Newton Highlands, MA, US)

Application Number: 973449
Filing Date: 1978-12-26
Publication_date: 1981-02-24
Assignee: Honeywell Information Systems Inc. (Waltham, MA)
Primary Class(es): 703/21
Other Classes:
US Patent Ref:

3412382	Nov, 1968	Couleur et al.	364/200.
3425036	Jan, 1969	Packard	364/200.
3461434	Aug, 1969	Barton et al.	364/200.
3546677	Dec, 1970	Barton et al.	364/200.
3614745	Sep, 1969	Podvin et al.	364/200.
3665487	May, 1972	Campbell et al.	364/200.
3766533	Oct, 1973	Black et al.	364/200.
3858182	Dec, 1974	Delagi et al.	364/200.
3955180	May, 1976	Hirtle	364/200.
3983539	Sep, 1976	Faber et al.	364/200.
3983541	Sep, 1976	Faber et al.	364/200.

Other Refs:
Primary Examiner: Springborn, Harvey E.
Assistant Examiner:
Attorney: Finnegan, Henderson, Farabow, Garrett & Dunner