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Title: Frequency analyzer comprising a digital band-pass and a digital low-pass filter section both operable in a time-division fashion
Claims: What is claimed is: 1. A digital frequency analyzer responsive to those digital samples of a frequency analyzer input signal which are supplied thereto in successive sampling periods, respectively, for producing a frequency analyzer output signal representative of those frequency analysis results of a predetermined number of channels into which said input signal is frequency analyzed for every analyzing frame period equal to a first presecribed number of said sampling periods, each of said sampling periods being equal to a predetermined number of intervals equal to the number of channels, said digital frequency analyzer comprising: a buffer memory for memorizing a preselected number of said digital samples with the memorized digital samples renewed in every sampling period; a band-pass filter section for subjecting said memorized digital samples given from said buffer memory to preselected band-pass filter processing to successively produce band-pass filter results for the respective channels in every sampling period, the band-pass filter results being thus successively produced in the respective intervals; and a low-pass filter section generating a low pass filter impulse response having a start and an end point and prescribed values in that duration between said start and said end points which is equal to a second prescribed number of said frame periods and also generating the impulse response with its phase, namely, the duration, shifted by said frame period successively as often as said second prescribed number for calculating products each of said band-pass filter results and the prescribed values read in the interval of production of said each band-pass filter results out of the impulse responses generated with the phase unshifted and shifted, for accumulating absolute values of products successively calculated for the respective channels and the respective phases, and for producing as said frequency analysis results the accumulated products for the respective channels in those of said sampling periods in which the generated impulse responses have the respective end points. 2. A digital frequency analyzer as claimed in claim 1, further comprising a control circuit for producing a timing signal specifying, in the duration of the low-pass filter impulse response generated with the phase unshifted, the respective sampling periods by the use of first serial numbers corresponding to zero through a final number equal to said first prescribed number multiplied by said second prescribed number and minus one, a channel selection signal specifying in each of said sampling periods the respective channels by the use of second serial numbers corresponding to zero through said predetermined number less one, a phase selection signal specifying in each of said intervals the respective phases by the use of third serial numbers corresponding to zero through said second prescribed number less one, a write-in clock pulse sequence in synchronism with said phase selection signal, and an output synchronization signal in synchronism, in those of said sampling periods which are specified by those of said first serial numbers which correspond to said first prescribed number multiplied by one through said second prescribed number minus one, with those portions of said phase selection signal which specify the respective phases by those respective ones of said third serial numbers which are equal to the last-mentioned ones of said first serial numbers, wherein said low-pass filter section comprises: means responsive to said band-pass filter results for producing the absolute values of the respective band-pass filter results; a low-pass parameter memory for generating the low-pass filter impulse responses of the respective phases; means responsive to said timing signal and said phase selection signal for successively reading out of said low-pass parameter memory in each of said intervals the prescribed values of the impulse responses of the phases specified by said third serial numbers, respectively; a multiplier for successively calculating the products of the absolute value of each of said band-pass filter results and the prescribed values successively read out of said low-pass parameter memory in the interval of production of the last-mentioned each band-pass filter results; an adder for successively calculating sums of the products and addends in each of said intervals; an accumulator register memory having addresses specifiable by combinations of said channel and said phase selection signals, respectively, for substitutably memorizing contents, respectively; means supplied with said channel and said phase selection signals for reading the contents out of the accumulator register memory addresses specified by the respective combination of the channel and the phase selection signals supplied thereto; means for supplying the read-out contents to said adder as said addends; means responsive to said write-in clock pulse sequence for successively substituting for the contents read out of the respective accumulator register addresses the sums calculated by the use of the respective read-out contents; and means responsive to said output synchronization signal for producing the sums as said frequency analysis results. 3. A digital frequency analyzer as claimed in claim 2, wherein said control circuit further produces a first control pulse sequence of a first repetition period equal to each of said intervals, a second control pulse sequence of a second repetition period equal to said first repetition period divided by said preselected number, and a first and a second address signal in synchronism with said second control pulse sequence for cyclically specifying addresses, equal in number to said preselected number, said buffer memory having addresses specifiable by said second address signal for said memorized digital samples, respectively, wherein said band-pass filter section comprises: means responsive to said second address signal for successively reading said memorized digital samples out of said memory; a band-pass parameter memory having addresses for memorizing band-pass filter impulse responses, equal in number to said preselected number, in the addresses specifiable by said channel selection signal, respectively, each of the memorized band-pass filter impulse responses having preselected values memorized in the band-pass parameter memory addresses specifiable by said first address signal, respectively; means responsive to said channel selection signal and said first address signal for reading the preselected values out of the band-pass parameter memory addresses specified by said first address signal for each of said band-pass filter impulse responses for which the band-pass parameter memory addresses are specified by said channel selection signal; and a filter convolution calculator responsive to said first and said second control pulse sequences for calculating in each of said second repetition periods a convolution of the readout digital samples and the preselected values of each of said band-pass filter impulses responses to provide each of said band-pass filter results. 4. A digital frequency analyzer as claimed in claim 1, further comprising a control circuit for producing a timing signal specifying in the duration of the low-pass filter impulse response generated with the phase unshifted, the respective sampling periods by the use of first serial numbers corresponding to zero through a final number equal to said first prescribed number multiplied by said second prescribed number minus one, a channel selection signal specifying in each of said sampling periods the respective channels by the use of second serial numbers corresponding to zero through said predetermined number less one, a phase selection signal specifying in each of said intervals the respective phases by the use of third serial numbers corresponding to zero through said second prescribed number less one, a write-in clock pulse sequence in synchronism with said phase selection signal, and an output synchronization signal in synchronism, in those of said sampling periods which are specified by those of said first serial numbers which corresponds to said first prescribed number multiplied by one through said second predetermined number minus one, with those portions of said phase selection signal which specify the respective phases by those respective ones of said third serial numbers which are equal to the last-mentioned ones of said first serial numbers, wherein said low-pass filter section comprises: low-pass parameter memory for generating the low-pass filter impulse responses of the respective phases; means responsive to said timing signal and said phase selection signal for successively reading out of said low-pass parameter memory in each of said intervals the prescribed values of the impulse responses of the phases specified by said third serial numbers, respectively; a multiplier for successively calculating the products of each of said band-pass filter results and the prescribed values successively read out of said low-pass parameter memory in the interval of production of the last-mentioned each band-pass filter results; adder means for successively calculating sums of the absolute values of the respective products and addends in each of said intervals; an accumulator register memory having addresses specifiable by combination of said channel and said phase selection signals, respectively, for substitutably memorizing contents, respectively; means supplied with said channel and said phase selection signals for reading the contents out of the accumulator register memory addresses specified by the respective combinations of the channel and the phase selection signals supplied thereto; means for supplying the read-out contents to said adder means as said addends; means responsive to said write-in clock pulse sequence for successively substituting for the contents read out of the respective accumulator register memory addresses the sums calculated by the use of the respective read-out contents; and means responsive to said output synchronization signal for producing the sums as said frequency analysis results. 5. A digital frequency analyzer as claimed in claim 4, wherein said control means further produces a first control pulse sequence of a first repetition period equal to each of said intervals, a second control pulse sequence of a second repetition period equal to said first repetition period divided by said preselected number, and a first and a second address signal in synchronism with said second control pulse sequence for cyclically specifying addresses, equal in number to said preselected number, said buffer memory having addresses specifiable by said second address signal for said memorized digital samples, respectively, wherein said band-pass filter section comprises: means responsive to said second address signal for successively reading said memorized digital samples out of said buffer memory; a band-pass parameter memory having addresses for memorizing band-pass filter impulse responses, equal in number to said preselected number, in the addresses specifiable by said channel selection signal, respectively, each of the memorized band-pass filter impulse responses having preselected values memorized in the band-pass parameter memory addresses specifiable by said first address signal, respectively; means responsive to said channel selection signal and said first address signal for reading the preselected values out of the band-pass parameter memory addresses specified by said first address signal for each of said band-pass filter impulse responses for which the band-pass parameter memory addresses are specified by said channel selection signal; and a filter convolution calculator responsive to said first and said second control pulse sequences for calculating in each of said second repetition periods a convolution of the read-out digital samples and the preselected values of each of said band-pass filter impulse responses to provide each of said band-pass filter results. Other info: Inventors: Sakoe, Hiroaki (Tokyo, JP) Chiba, Seibi (Tokyo, JP) Application Number: 883971 Filing Date: 1978-03-06 Publication_date: 1979-06-05 Assignee: Nippon Electric Co., Ltd. (Tokyo, JP) Primary Class(es): 704/205 702/76, 708/316 Other Classes: US Patent Ref: Other Refs:
J. Allen et al., "A Unified Approach to Short-Time Fourier," Proc. IEEE, Nov. 1977, pp. 1558-1564. | |