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Title: Voltage controlled oscillator having equally controlled current source and current sink
Claims: What is claimed is: 1. The combination comprising: an oscillator, having two voltage terminals, whose output frequency varies as a function of the voltage applied across said two voltage terminals; first and second power terminals for the application therebetween of an operating voltage; a current source connected between said first power terminal and one of said two voltage terminals; a current sink connected between said second power terminal and the other one of said two voltage terminals; an input control terminal adapted to receive a control signal; control means coupled between the input control terminal and said current source and current sink responsive to the amplitude of the signal at said control terminal for maintaining the amplitude of the current through said current source substantially equal to that through said current sink for monotonically varying the amplitude of said current through said current source and sink and monotonically altering said oscillator output frequency as a function of said control signal. 2. The combination as claimed in claim 1 wherein said oscillator includes a plurality of cascaded inverter stages connected in a ring configuration; at least one inverting stage having a conduction path connected between said two voltage terminals and having an input and an output; said inverting stage being operated in the linear portion of its transfer characteristic and providing a continuous conduction path between said current source and current sink. 3. The combination as claimed in claim 2 wherein said current source includes a first (P2) insulated-gate field-effect transistor (IGFET) of P conductivity type having a control electrode, and a conduction path connected between said first power terminal and one of said two voltage terminals; wherein said current sink includes a second (N2) IGFET of N conductivity type having a control electrode and a conduction path connected between said second power terminal and the other one of said two voltage terminals; wherein said control means includes a third (P1) P type IGFET and a fourth (N1) N type IGFET; each IGFET having a control electrode and a conduction path; wherein the conduction paths of said third and fourth IGFETs being connected in series between said first and second power terminals; one end of said third IGFET being connected to said first power terminal and one end of said fourth IGFET being connected to said second power terminal; wherein the control electrodes of said first and third IGFETs are connected to a point common to the conduction paths of said third and fourth IGFETs; and wherein the control electrode of said second and fourth IGFETs are connected in common to said input control terminal. 4. The combination as claimed in claim 2 wherein each one of said inverting stages is a complementary inverter comprised of one transistor of P conductivity type and another transistor of N conductivity type. 5. The combination as claimed in claim 4 wherein each one of said transistors is an insulated-gate field-effect transistor. 6. The combination as claimed in claim 4 wherein each one of said inverting stages has an output for producing signals varying about the quiescent point approximately midway between the operating voltages applied to said first and second power terminals in response to the signals at its input. 7. The combination as claimed in claim 6 further including a buffer having a signal input and a signal output, and powered directly by the voltages applied to said first and second power terminals; said buffer being directly connected at its input to the output of one of said inverting stages and producing signals at its output having a quiescent point approximately midway between the voltages applied to said first and second power terminals. 8. The combination as claimed in claim 2 further including a tank circuit; wherein said tank circuit is alternating current (a.c.) coupled to the output of one stage of said oscillator, said tank circuit having a resonant point set below the lowest frequency at which said oscillator is to operate. Other info: Inventors: Dingwall, Andrew G. F. (Bridgewater, NJ, US) Rosenthal, Bruce D. (Mountain View, CA, US) Application Number: 783657 Filing Date: 1977-04-01 Publication_date: 1978-02-07 Assignee: RCA Corporation (New York, NY) Primary Class(es): 331/57 331/108B, 331/108C, 331/108D, 331/117R, 331/117FE, 331/177R Other Classes: US Patent Ref:
Other Refs: Primary Examiner: Grimm, Siegfried H. Assistant Examiner: Attorney: Christoffersen; H., Schanzer; H. I. |
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