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Title: Analogue computer for solving polynomial equations
Claims: We claim: 1. An analogue computer for solving polynominal equations of the type described comprising a high gain comparator means operative to provide a common multiplier signal dependent on the difference between a composite signal and a reference level; at least two multiplication modules, each module being responsive to said common multiplier signal to provide a respective analogue output signal which is representative of the product of the magnitude of a respective analogue input signal to the respective module and the factor represented by said common multiplier signal; and means for combining the analogue output signals of at least two said modules to provide said composite signal as a negative feedback input signal to the comparator means, the gain of the comparator means being such that the computer is operative to maintain said composite signal substantially equal to said reference level. 2. An analogue computer as claimed in claim 1 wherein the output signal combining means includes an adjustable scaling means for each module for producing a signal selectively scaled as desired with respect to the output signal of the module, so as to represent a corresponding term of the equation to be solved. 3. An analogue computer as claimed in claim 2 wherein each scaling means comprises a potentiometer connected to shunt the output signal of the module to earth, the scaled signal being fed from the slider of the potentiometer. 4. An analogue computer as claimed in claim 2 wherein the combining means further comprises means for adding together those scaled signals representing terms of one polarity in the polynominal expression of the equation and the inverse of those scaled signals representing terms of the other polarity, thereby to provide said composite signal, the relative polarities being chosen to provide negative feedback. 5. An analogue computer as claimed in claim 4 wherein the adding means includes means for adding to the scaled signals at least one signal from a respective analogue signal source. 6. An analogue computer as claimed in claim 1 wherein the multiplication modules are connected in at least one chain, the input signal of any but the first module in the chain being supplied by the output signal of the preceding module in the chain. 7. An analogue computer as claimed in claim 4 wherein the combining means further comprises switching means for selectively switching desired scaled signals for adding together as terms of either said one or said other polarity. 8. An analogue computer as claimed in claim 4 wherein the adding means includes an inverter arranged to provide a signal representing the inverse of the sum of scaled signals representing terms of said other polarity, said inverse sum signal being added to the scaled signals representing terms of said one polarity. 9. An analogue computer as claimed in claim 1 wherein the comparator means is arranged to provide a common multiplier signal in the form of a time proportioned logic signal, for which the multiplication factor is represented by the fraction of time spent in one of two states. 10. An analogue computer as claimed in claim 9 wherein each of the multiplication modules comprises a switching circuit giving on-off switching of the analogue input signal to the module and an averaging circuit fed with the switched input signal and providing the analogue output signal of the module. 11. An analogue computer as claimed in claim 10 wherein the comparator means are arranged such that the time proportioned logic signal is a succession of pulses of uniform duration, the mean pulse frequency being controlled by the comparator means. 12. An analogue computer as claimed in claim 11 wherein the comparator means comprise a high gain amplifier and, in combination therewith, an analogue to pulse frequency converter to provide a pulse frequency proportional to the amplitude of the amplifier output signal. 13. An analogue computer as claimed in claim 11 wherein the comparator means comprise a high gain differential amplifier, having a first input connected to be held at said reference level and a second input connected to be supplied with said composite signal, and an analogue to pulse train converter controlled by the output signal of said differential amplifier to provide a train of pulse signals when the reference level exceeds the composite signal. 14. Analogue computer as claimed in claim 13 wherein the analogue to pulse train converter comprises a JK flip-flop arranged to be clocked at a constant rate and having the output signal of the high gain differential amplifier supplied to one of the logic inputs and a constant logic "1" signal supplied to the other of the logic inputs. 15. An analogue computer as claimed in claim 10 wherein the comparator means are arranged such that the time proportioned logic signal is a cyclic signal having relative durations in two states controlled in accordance with the difference between the composite signal and the reference level. 16. An analogue computer as claimed in claim 15 wherein the comparator means comprise a high gain differential amplifier, having a first input connected to be held at said reference level and a second input connected to be supplied with said composite signal, and a D-type flip-flop arranged to be clocked at a constant rate and having a logic input supplied with the output signal of the differential amplifier. 17. An analogue computer as claimed in claim 15 wherein the comparator means comprise a high gain differential amplifier, having a first input connected to be held at said reference level and a second input connected to be supplied with said composite signal, and a Schmidt trigger circuit supplied with the output of the differential amplifier. 18. An analogue computer as claimed in claim 9 and including an averaging circuit responsive to said time proportioned logic signal to produce an analogue signal representative of the factor represented by said common multiplier signal. 19. An analogue computer as claimed in claim 9 wherein at least one said respective analogue input signal to a module is a reference signal representing a constant value and having means supplying the corresponding analogue output signal of the module as an analogue signal representing said factor. 20. A gas density calculator comprising a pressure sensor for providing an analogue signal representative of the pressure of a gas of which the density is to be calculated, a temperature sensor for providing an analogue signal representative of the temperature of the gas, a high gain comparator means operative to provide a common multiplier signal dependent on the respective difference between a composite signal and a zero reference level; two chains each of three multiplication modules, each module being responsive to said common multiplier signal to provide a respective analogue output signal which is representative of the product of the magnitude of a respective analogue input signal to the module and the factor represented by said common multiplier signal, the input signals of the second and third modules in each chain being supplied by the output signals of the first and second modules respectively of the respective chain, the input signal of the first module in one chain being a constant reference signal and that of the first module in the other chain being provided by said gas temperature signal, means for combining the output signals of all said modules together with said gas pressure signal to provide said composite signal so as to be representative of the polynominal expression of the equation, the composite signal being a negative feed back signal to the comparator means and the gain of the comparator means being such that the computer is operative to maintain said composite signal substantially equal to said zero reference level. Other info: Inventors: Johnston, James Stewart (Bognor Regis, EN) Cope, Dennis George (Pagham, EN) Application Number: 549139 Filing Date: 1975-02-12 Publication_date: 1976-04-27 Assignee: Rosemount Engineering Company Limited (Bognor Regis, EN) Primary Class(es): 708/802 702/45, 702/137 Other Classes: US Patent Ref:
Other Refs: Primary Examiner: Ruggiero, Joseph F. Assistant Examiner: Attorney: Dugger, Johnson & Westman |
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