Title: Computer memory addressing employing base and index registers

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Claims: What is claimed is:

1. A system for computer memory addressing which permits accessing to an original, internal, memory of a computer whose capacity in words is no longer adequate as well as to an additional, external, memory which extends the capacity to an adequate level, the system comprising:

means for accessing an instruction word generated by the internal memory, the word including an M-bit index designator and an N-bit operand address designator;

an index register, each of whose cells have the capability of containing N bits;

a base register, each of whose cells have the capability of containing N + K bits, for offsetting all addresses in a given class by a given amount;

means connected to the accessing means to receive the index designator for simultaneously accessing corresponding cells in the index and base registers;

a first adder, coupled to receive the operand address designator and the accessed signal of the index register;

a second adder, coupled to receive the output signal of the first adder and the accessed signal of the base register; and;

a comparator, whose input is the output of the second adder, which compares the magnitude of the address of the instruction word with the magnitude of a word generated within the comparator representing the capacity of the original internal memory, and generates an output signal which is alternatively directed to

1. the internal memory if the magnitude of the address of the instruction word is at least equal to the capacity of the internal memory; and

2. to the external memory if the magnitude of the address of the instruction word is greater than the capacity of the internal memory.

2. The computer memory addressing system according to claim 1, further comprising:

means for connecting the base register to an accumulator register of the computer for writing into and reading out of the base register.

3. The computer memory addressing system according to claim 1, further comprising:

means for connecting the base register to the input-output channel of the computer for extending the input and output of the computer.

Other info:

Inventors: Crabb, Robert P. (San Diego, CA, US)
Unger, Robert A. (El Cajon, CA, US)
Gilbreath, Jim A. (San Diego, CA, US)

Application Number: 531016
Filing Date: 1974-12-09
Publication_date: 1976-04-06
Assignee: The United States of America as represented by the Secretary of the Navy (Washington, DC)
Primary Class(es): 711/220
Other Classes:
US Patent Ref:

3287703	Nov, 1966	Slotnick	340/172.
3389380	Jun, 1968	Ashbaugh	340/172.
3401376	Sep, 1968	Barnes	340/172.
3461434	Aug, 1969	Barton	340/172.
3657705	Apr, 1972	Mekot, Jr.	340/172.
3699528	Oct, 1972	Carlson	340/172.
3787813	Jan, 1974	Cole	340/172.

Other Refs:
Primary Examiner: Zache, Raulfe B.
Assistant Examiner: Thomas, James D.
Attorney: Sciascia; Richard S., Johnston; Ervin F., Stan; John