Title: System for extending the interior decor of a microprogrammed computer

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Claims: What is claimed is:

1. In a computer of the type with read-write working memory and a microprogrammed control unit provided with a read-only microprogramming memory containing microprograms for executing so-called "allowed" machine instructions, a system for extending interior decor capability which comprises:

transcoding means coupled to said working memory for receiving operating codes of machine instructions stored in said working memory and for providing an output signal of a first level when the received operating code is one of said "allowed" machine instructions, and for providing an output signal of a second level when the received operating code is not one of said "allowed" machine instructions;

memory means in said working memory for storing therein so-called "additional" microprograms for executing a set of so-called "additional" machine instructions;

control means coupled to said transcoding means and responsive to said output signal of a first level for initiating fetching and execution of said "allowed" machine instructions in said microprogramming memory and responsive to said output signal of a second level for accessing said working memory to determine if there is an "additional" microprogram in said working memory corresponding to said received operation code; and

circuit means coupled to said memory means and responsive to said control means for initiating fetching and execution of said "additional" microprogram.

2. A system as recited in claim 1 wherein said transcoding means is coupled to said working memory indirectly by an operating unit which processes said machine instructions.

3. A system as recited in claim 1 wherein said control means generates an exception signal in response to said output signal of a second level.

4. A system as recited in claim 3 further comprising first means responsive to said exception signal for initiating a first microprogram of examination resident in the microprogramming memory for determining that the cause of said exception signal is detection of a so-called "forbidden" operating code.

5. A system as recited in claim 4 wherein, said first means initiates a second microprogram of examination resident in said microprogramming memory for determining if an additional microprogram is resident in said working memory for locating in said memory means the address of one of said "additional" microprograms corresponding to said "forbidden" operating code.

6. In a microprogrammed computer, a system for extending so-called interior decor which comprises:

a working memory for recording machine instructions with operating codes and for recording additional microprograms for carrying out so-called additional machine instructions; and

a microprogrammed control unit which includes:

a microprogrammed memory for recording a first set of microprograms for carrying out so-called "allowed" machine instructions and a second set of microprograms for carrying out exception routines;

first means coupled to said working memory for receiving and decoding said additional microprograms and coupled to said microprogramming memory for receiving and decoding said first set of microprograms;

second means coupled to said working memory for receiving said operating codes and for classifying said operating codes as "allowed" or "forbidden";

said second means also coupled to said control unit for initiating the execution of said first set of microprograms in response to said "allowed" operating codes, and for initiating the execution of said second set of microprograms in response to said "forbidden" operating codes; and

said control unit also coupled to said working memory for determining if working memory contains said additional microprograms corresponding to said "forbidden" operating codes and, if such a determination is made for causing the transmission of said additional microprograms to said first means.

7. A system as recited in claim 6 wherein said second means comprises a transcoding memory which receives said operating codes, said transcoding memory storing and transmitting:

a first type of microword in response to said "allowed" operating codes, and

a second type of microword in response to said "forbidden" operating codes.

8. A system as recited in claim 7 wherein said first type of microword comprises information which when decoded initiates the execution of said first set of microprograms.

9. A system as recited in claim 7 wherein said second type of microword comprises information which when decoded initiates the execution of said second set of microprograms.

10. A system as recited in claim 7 further comprising third means responsive to microwords of said first type for masking at least one bit of a microword of said second type, whereby the initiating of the execution of a microprogram of said second set is avoided.

Other info:

Inventors: Brioschi, Antonio (Milan, IT)

Application Number: 511135
Filing Date: 1974-10-02
Publication_date: 1976-04-06
Assignee: Honeywell Information Systems, Inc. (Phoeniz, AZ)
Primary Class(es): 712/208
Other Classes:
US Patent Ref:

3634883	Jan, 1972	Kreidermacher	340/172.
3646522	Feb, 1972	Furman	340/172.
3673575	Jun, 1972	Burton et al.	340/172.
3700873	Oct, 1972	Yhap	340/172.
3713108	Jan, 1973	Edstrom et al.	340/172.
3728690	Apr, 1973	Holtey et al.	340/172.
3768075	Oct, 1973	Reitsma et al.	340/172.

Other Refs:
Primary Examiner: Shaw, Gareth D.
Assistant Examiner: Thomas, James D.
Attorney: Holloway, Jr.; William W., Frank; David A.