Title: Computer interactive resistance simulator (CIRS)

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Claims: What I claim is:

1. A combination of components for simulating the insertion of selected resistances of either positive or negative values in an electric circuit comprising:

a. a first amplifier means for providing an output voltage equal to a constant times a current in said circuit,

b. a multiplier operatively connected to said first amplifier for receiving said output therefrom,

c. means for providing a selected input of a manipulated value into said multiplier as a second input thereto whereby the output of said multiplier is the product of said selected input, a constant and said current, and

d. a second amplifier means, operatively connected to said multiplier to receive said output therefrom as a first input and operatively connected to receive an input representative of the input to said first amplifier means as a second input, for providing an output of said combination equal to the product of a constant, said selected input and said current.

2. The combination of claim 1 wherein said first amplifier means include an amplifier having a resistance through which said current flows across its two inputs whereby the input into said first amplifier means is equal to said current times said resistance.

3. The combination of claim 2 wherein said circuit is a bridge circuit having a detector in one leg thereof and said current flows in said leg and through said resistance connected across said amplifier of said first amplifier means.

4. The combination of claim 2 wherein:

a. the junctions of said combination with said circuit are at the first input of said amplifier of said first amplifier means and the second output of said second amplifier means, which second amplifier means is connected in the differentiating mode and,

b. the second input of the amplifier of said first amplifier means is connected to the first output of said second amplifier means.

5. The combination of claim 4 wherein said circuit is a bridge circuit having a detector in one leg thereof and said current flows in said leg and through said resistance connected across said amplifier of said first amplifier means.

6. The combination of claim 1 wherein said selected input is a discrete value.

7. The combination of claim 6 wherein said selected input is a digital input converted to analog.

8. The combination of claim 7 wherein said multiplier is of the multiplying DAC type.

9. The combination of claim 1 additionally including means for sensing voltage representative of error in the circuit across selected points in said combination and inputting said voltage into said second amplifier means as an error signal.

10. The combination of claim 9 additionally including means for retaining said error signal when said selected input is zero and inputting said retained signal into said second amplifier thereby compensating for said error signal in the electrical output of said combination.

Other info:

Inventors: Mayn, Bobby G. (Pleasanton, CA, US)

Application Number: 538490
Filing Date: 1975-01-03
Publication_date: 1976-03-30
Assignee: The United States of America as represented by the United States Energy (Washington, DC)
Primary Class(es): 708/1 327/356, 338/13, 703/4
Other Classes:
US Patent Ref:

2401447	Jun, 1946	Wipff	328/160.
2860241	Nov, 1958	Post	235/195.
3396267	Aug, 1968	Dietrich	235/184.
3562553	Feb, 1971	Roth	235/194.
3633005	Jan, 1972	Leighton	235/194.

Other Refs:
Primary Examiner: Gruber, Felix D.
Assistant Examiner:
Attorney: Carlson; Dean E., Koch; John A.