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Title: Method of producing a semiconductor arrangement
Claims: What is claimed is: 1. A method for producing a semiconductor arrangement from a semiconductor body covered with an insulating layer provided with windows at desired points of connection to regions in the semiconductor body, said arrangement having conducting paths running on the insulating layer and contacting the regions in the semiconductor body and the conducting paths at certain points being so reinforced by electrolytically deposited metal that the thickened contact parts resulting in this case are suitable for the wire-less contacting of the semiconductor arrangement, comprising: firstly applying a metal layer over said insulating layer provided with windows to cover said insulating layer and said windows; covering the portions of said metal layer corresponding to the desired positions of said conducting paths with a first masking layer, which moveover leaves uncovered the portions of said metal layer to be provided with said thickened contact parts; thereafter covering the entire semiconductor surface, with the exception of the portions to be provided with said reinforced contact parts, with a second masking layer; electrolytically depositing said thickened contact parts on said metal layer at said portions left uncovered by the two masking layers; thereafter removing said second masking layer; subsequently removing said metal layer at the positions not covered by said first masking layer to produce said conducting paths. 2. A method as defined in claim 1, wherein after the production of said conducting paths by partial removal of said metal layer, said first masking layer is removed and the entire surface is covered with a further insulating layer, and wherein connection windows are formed in said further insulating layer at said thickened contact parts. 3. A method as defined in claim 1, wherein said two masking layers comprise photo lacquer layers which are soluble in or removable by different media. 4. A method as defined in claim 3, wherein one of said masking layers comprises negative photo lacquer and the other of said masking layers comprises positive photo lacquer. 5. A method as defined in claim 1, wherein said metal layer comprises a plurality of individual layers arranged one on the other, wherein gold is used as the uppermost individual layer and wherein said thickened contact parts of gold are electrolytically deposited onto said gold layer. 6. A method as defined in claim 5, wherein the lowermost metal individual layer running directly on said insulating layer or on said semiconductor material comprises titanium. 7. A method as defined in claim 6, wherein an intermediate layer of molybdenum, tungsten, palladium or platinum is arranged between said gold layer and said titanium layer. 8. A method of producing contacts and conductive paths for a semiconductor body provided with one or more regions to be contacted comprising: applying an insulating layer defining contact windows for said regions to a surface of said semiconductor body; covering said insulating layer and said windows with a metal layer; forming a first masking layer on said metal layer for covering the portions of said metal layer which are to form conducting paths and leaving exposed undesired portions of said metal layer and portions thereof on which thickened metal contacts for the conductive paths are to be provided; covering said first masking layer and the exposed portions of said metal layer with the exception of said portions on which the thickened metal contacts are to be provided with a second masking layer; electrolytically depositing said thickened metal contacts on the portions of said metal layer left exposed by both said first and second masking layers; thereafter removing said second masking layer; and removing the exposed portions of said metal layer to form said conductive paths. 9. A method as defined in claim 8, further comprising thereafter removing said first masking layer. 10. A method as defined in claim 9, and comprising finally applying an insulating layer to said semiconductor body for defining windows as said thickened metal contact points. Other info: Inventors: Botzenhardt, Leonhard (Heilbronn, DT) Application Number: 453881 Filing Date: 1974-03-22 Publication_date: 1976-02-03 Assignee: Licentia Patent-Verwaltungs-G.m.b.H. (Frankfurt am Main, DT) Primary Class(es): 438/613 257/750, 257/E21.175, 438/614, 438/678 Other Classes: US Patent Ref:
Other Refs: Primary Examiner: Tupman, W. Assistant Examiner: Attorney: Spencer & Kaye |
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