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Title:
Fabrication of isolation oxidation for MOS circuit
Abstract:
A method is disclosed for fabricating an isolation oxidation (44), also referred to as field oxide, to separate the active regions on the surface of an MOS integrated circuit. On the surface of a semiconductor substrate (24) there are fabricated in successive layers an oxide layer (26), a polysilicon layer (28) and a nitride layer (30). A patterned resist layer (32) is formed on the surface of the nitride layer (30). The nitride layer (30) is etched through an opening (34) in the resist layer (32), which is then removed. The isolation oxidation (44) is then grown through an opening (36) in the nitride layer (30). The isolation oxidation (44) comprises oxide derived from the oxide layer (26) and from oxide produced from the polysilicon layer (28) and the semiconductor substrate (24). Next, the nitride layer (30), the polysilicon layer (28) and the oxide layer (26) are etched. The resulting isolation oxidation (44) has a bird's-beak area (46) which is less than 50% of the width of a bird'-beak area (14) produced using conventional MOS manufacturing processes.
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Inventors:
Han, Yu-pin (Dallas, TX)
Ma, Bing C. (Carrollton, TX)
Application Number:
06/453214
Filing Date: 1982-12-27 Publication_date: 1983-10-04 Assignee:
MOSTEK CORP (US)
Primary Class(es):
438/448
257/E21.556, 257/647, 257/506, 156/356, 438/966 Other Classes:
H01L21/762; H01L21/70; C03C15/00; B44C1/22; H01L21/306; C03C25/06
US Patent Ref:
Other Refs:
Primary Examiner:
Powell, William A.
Assistant Examiner:
Attorney:
Finnegan, Henderson, Farabow, Garrett & Dunner
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