Title: Digital matrix switching

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Abstract: Eight input ports are sampled once every eight clock pulse intervals, and the samples are multiplexed to an eight-bit collecting register that stores data bit signals from selected input ports in cells corresponding to the location of designated output ports selected in accordance with selection signals stored in a 64-bit RAM having eight-bit words that may be changed to designate the connections among input ports and output ports for data transfer. The data signals in the eight-bit collecting register are transferred to an output holding register in cells corresponding to respective output ports that are released in response to the sample signal.


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