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Title:
IGFET Bootstrap circuit
Abstract:
An improved IGFET bootstrap driver circuit capable of driving a load impedance to substantially full VDD power supply voltage and holding the load at that voltage for an indefinite period of time. The circuit includes a load transistor, a feedback capacitor connected between the source and gate electrodes of the load transistor, a fix valued resistor connected between the gate electrode of the load transistor and an on-chip bias voltage generating circuit for providing a bias voltage greater than VDD+VT. The resistor and the bias voltage generating circuit provide sufficient current to replenish the charge lost from the feedback capacitor through junction leakage currents in the driver circuit. The resistor is of a sufficiently high value such that the current drain from the generating circuit is insignificantly small in comparison to the current drain from the VDD power supply. The improved circuit also permits the load transistor to be switched "on" or "off" by an externally applied signal.
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Inventors:
Rosenzweig, Walter (Allentown, PA)
Application Number:
06/044397
Filing Date: 1979-05-31 Publication_date: 1981-08-18 Assignee:
BELL TELEPHONE LABOR INC
Primary Class(es):
326/88
326/52
Other Classes:
G05F3/20; H03K19/017; H03K19/0185; G05F3/08; H03K19/01; H03K19/003; H03K19/094; H03K19/20
US Patent Ref:
| 3506851 | April, 1970 | Polkinghorn et al. | 307/251 | FIELD EFFECT TRANSISTOR DRIVER USING CAPACITOR FEEDBACK | | 3649843 | March, 1972 | Redwine et al. | 307/251 | MOS BIPOLAR PUSH-PULL OUTPUT BUFFER | | 3774055 | November, 1973 | Bapat | 307/DIG.4 | CLOCKED BOOTSTRAP INVERTER CIRCUIT | | 3805095 | April, 1974 | Lee et al. | 307/DIG.4 | FET THRESHOLD COMPENSATING BIAS CIRCUIT | | 3808468 | April, 1974 | Ludlow et al. | 307/304 | BOOTSTRAP FET DRIVEN WITH ON-CHIP POWER SUPPLY | | 3906255 | September, 1975 | Mensch, Jr. | 307/205 | MOS current limiting output circuit | | 3986044 | October, 1976 | Madland et al. | 307/205 | Clocked IGFET voltage level sustaining circuit | | 4071783 | January, 1978 | Knepper | 307/205 | Enhancement/depletion mode field effect transistor driver | | 4110776 | August, 1978 | Rao et al. | 357/23 | Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer |
Other Refs:
Primary Examiner:
Anagnos, Larry N.
Assistant Examiner:
Attorney:
Torsiglieri, Arthur J.
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