Title: High speed loading of output register of CCD array system

Abstract: The output register of a CCD imager system is loaded at high speed by, for each row of charges, first translating the m charges in each group of m adjacent ones of the n columns of the imager into m serially occurring charges and temporarily storing each group of m serially occurring charges in a separate CCD register. The time available for the translation and temporary storage is equal to the time required serially to read out the output register. The n/m temporarily stored groups of charges are then concurrently serially shifted from the n/m registers in which they are stored to the output register which comprises m parallel registers, each with n/m stages. This shifting for loading the register can be performed at very high speed.

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Inventors: Kosonocky, Walter F. (Skillman, NJ, US)
Angle, Rodney L. (Somerville, NJ, US)

Application Number: 944013
Filing Date: 1978-09-20
Publication_date: 1980-12-02
Assignee: RCA Corporation (New York, NY)
Primary Class(es): 348/317 257/222, 257/229, 257/E27.154, 377/54, 377/67
Other Classes:
US Patent Ref:

3811055	May, 1974	Weimer.
3873851	Mar, 1975	Weimer.
3953837	Apr, 1976	Cheek	307/221.
3971003	Jul, 1976	Kosonocky.
3988613	Oct, 1976	Brown et al.	250/211.

Other Refs:
Primary Examiner: Nelms, David C.
Assistant Examiner:
Attorney: Cohen; Samuel, Christoffersen; H.