Title: CMOS-bipolar EAROM

Abstract: A memory array having NPN emitter followers with B V.sub.EB >20 volts and high threshold electrically alterable devices in each cell, CMOS row and column address buffer drivers and CMOS outputs buffers. The row address buffer includes an emitter follower as the output stage in a Darlington configuration with the array emitter follow capable of carrying high current and voltages for the programming and read modes.

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Inventors: Taylor, David L. (Melbourne, FL, US)

Application Number: 953316
Filing Date: 1978-10-20
Publication_date: 1980-03-04
Assignee: Harris Semiconductor (Melbourne, FL)
Primary Class(es): 365/163 148/DIG55, 326/38, 326/40, 326/41, 326/42, 326/45
Other Classes:
US Patent Ref:

3601630	Aug, 1971	Redwine	365/183.
3649843	Mar, 1972	Redwine et al.	365/183.
3721964	Mar, 1973	Barrett et al.	365/183.
3792319	Feb, 1974	Tsang	365/183.
3862367	Jan, 1975	Kono et al.	179/1.

Other Refs:
Primary Examiner: Fears, Terrell W.
Assistant Examiner:
Attorney: Leitner, Palan, Martin & Bernstein