Title: Digital memory providing fixed and variable delays in a TASI system

Abstract: A time assignment speech interpolation system has a random access memory which provides both a fixed and a variable delay between an input speech channel and a transmission facility. Digital samples of the signal detected on an input speech channel are stored for a fixed time in a portion of the memory in order to provide time for switching without clipping and for generation of a channel identifying symbol. If a transmission facility is available, the sample is read out of memory after the fixed delay and reconstituted into an analog signal which is transmitted on the available facility. If no transmission facility is available, the samples are read out of memory after the fixed delay and written into another portion of memory which stores them for variable times until a transmission facility is available. The portions of the memory assigned to providing variable delay are paired. Starting addresses are at the two extremes of memory locations in a pair, and successive memory locations extend toward the other extreme starting address.

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Inventors: Clingenpeel, Glenn R. (Northglenn, CO, US)

Application Number: 863903
Filing Date: 1977-12-23
Publication_date: 1980-01-15
Assignee: Storage Technology Corporation (Louisville, CO)
Primary Class(es): 370/435 370/428
Other Classes:
US Patent Ref:

3644680	Feb, 1972	Amano et al.	179/15.
3836719	Sep, 1974	Clark	179/15.
4012595	Mar, 1977	Ota	179/15.
4048447	Sep, 1977	Matluta	179/15.

Other Refs:
Primary Examiner: Robinson, Thomas A.
Assistant Examiner:
Attorney: Woodcock, Washburn, Kurtz & Mackiewicz