Title: PCM channel monitoring system for detecting errors using single parity bit

Abstract: A channel monitoring system for a carrier wave differential phase modulation PCM transmission system is disclosed. Channel monitoring is accomplished with only one parity bit for one monitoring section of a PCM signal by making use of the correlation in the occurrence of errors due to an error in phase in the transmission path. The PCM signal is monitored at alternate code time slots with the parity check system so that a single code error to an adjacent phase in one parity monitoring section can be detected as a single bit error. Therefore, an error in one parity monitoring section can be reliably detected with the one parity bit so long as the error occurs only once in one monitoring section.

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Inventors: Murakami, Masatoshi (Tokyo, JP)

Application Number: 929601
Filing Date: 1978-07-31
Publication_date: 1980-01-08
Assignee: Nippon Electric Co., Ltd. (Tokyo, JP)
Primary Class(es): 714/800 375/280, 375/283
Other Classes:
US Patent Ref:

3585586	Jun, 1971	Harmon et al.	325/41.
3891959	Jun, 1975	Tsuji et al.	325/41.
3940736	Feb, 1976	Inaba et al.	325/41.
4003020	Jan, 1977	Clarke	340/146.

Other Refs:
Primary Examiner: Griffin, Robert L.
Assistant Examiner: Orsino, Jr., Joseph A.
Attorney: Sughrue, Rothwell, Mion, Zinn and Macpeak