Title: Apparatus for monitoring and checking processor operation sequences

Abstract: Apparatus for monitoring and controlling the sequence analysis of processor operations in electronic digital computers. Each flip-flop in a flip-flop chain is associated with an operational step for setting up a monitoring and check sequence. The sequence is controlled by a flip-flop ring and consists of several steps each of which represents a monitoring or check function. An oscillator signal is fed to all flip-flop stages, together with a further control signal. Switching of flip-flops is effected in such a manner that at any one time only one flip-flop is on, its output signal and a coinciding oscillator signal generating a control signal which is converted in an address generator into an address for fetching a subroutine from a storage to control the monitoring and check function associated with the flip-flop.

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Inventors: Huesing, Juergen (Selent, DE, US)
Lampe, Hans H. (Herrenberg, DE, US)

Application Number: 892455
Filing Date: 1978-04-03
Publication_date: 1979-12-04
Assignee: International Business Machines Corporation (Armonk, NY)
Primary Class(es): 714/51
Other Classes:
US Patent Ref:

3739345	Jun, 1973	Janssens et al.	364/200.
4025768	May, 1977	Missios et al.	235/304.
4084262	Apr, 1978	Lloyd et al.	364/900.

Other Refs:
Primary Examiner: Malzahn, David H.
Assistant Examiner:
Attorney: Gershuny; Edward S.