Title: Firmware/hardware system for testing interface logic of a data processing system

Abstract: A firmware/hardware method and system is provided for testing interface logic in a data processing system having a plurality of system units intercommunicating over a common electrical bus. Under firmware control, an incorrect parity is generated in a main memory address to be loaded into output registers of a system unit supplying information to the bus. A bus cycle request is issued by the system unit, and when the bus is made available the system unit acknowledges the memory address to initiate a transfer of data from the bus into the input registers of the system unit. Thereafter, the data in the output registers of the device may be compared with the data in the input registers to detect interface logic errors.

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Inventors: Getson, Jr., Edward F. (Lynn, MA, US)
Cassarino, Jr., Frank V. (Weston, MA, US)

Application Number: 821939
Filing Date: 1977-08-04
Publication_date: 1979-06-26
Assignee: Honeywell Information Systems Inc. (Waltham, MA)
Primary Class(es): 714/43 714/32
Other Classes:
US Patent Ref:

3576541	Apr, 1971	Kwan et al.	364/200.
3579199	May, 1971	Anderson et al.	364/200.
4048481	Sep, 1977	Baile, Jr. et al.	364/200.

Other Refs:
Primary Examiner: Nusbaum, Mark E.
Assistant Examiner: Heckler, Thomas M.
Attorney: Lester; Gerald E., Prasinos; Nicholas, Reiling; Ronald T.