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Primary Examiner: Anagnos, Larry N.
Assistant Examiner:
Attorney: Hill, Gross, Simpson, Van Santen, Steadman, Chiara & Simpson

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Title: Decoder circuit arrangement with MOS transistors

Abstract: A decoder circuit arrangement with MOS transistors includes a decoder circuit and an output stage. The output stage includes a driver transistor which emits a selection signal, in accordance with a decoder signal emitted from the decoder circuit, and includes a shunt transistor having a controlled path connected between the output of the decoder circuit and the output of the output stage and a control input which is supplied with the selection signal. An additional transistor has a controlled path connected between the output of the output stage and a fixed potential and a control input which is driven by a timing signal which renders the additional transistor conductive, at least during the time in which the selection signal is not present.

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Inventors: Hofmann, Ruediger (Munich, DE, US)
VON Basse, Paul-Werner (Wolfratshausen, DE, US)

Application Number: 825274
Filing Date: 1977-08-17
Publication_date: 1979-03-20
Assignee: Siemens Aktiengesellschaft (Berlin & Munich, DE)
Primary Class(es): 326/106 326/83, 326/98, 365/230.06
Other Classes:
US Patent Ref:

3702926	Nov, 1972	Picciano et al.	307/205.
3718826	Feb, 1973	Donofrio et al.	307/DIG.
3795898	Mar, 1974	Mehta et al.	307/DIG.
3959781	May, 1976	Mehta et al.	307/DIG.
3986054	Oct, 1976	Hansen et al.	307/DIG.
3995171	Nov, 1976	Sonoda et al.	307/DIG.
4001601	Jan, 1977	Schuster	307/DIG.
4011549	Mar, 1977	Bormann	307/DIG.
4027174	May, 1977	Ogata	307/DIG.
4048629	Sep, 1977	Bormann	307/DIG.
4063118	Dec, 1977	Nishimura	307/DIG.

Other Refs: 2417972

Oct, 1975	DE

Other References: Remshardt et al., IEEE Journal of Solid-State Circuits, vol. SC-11, No. 3, pp. 352-358; Jun. 1976.
SIMI, "Field-Effect Transistor Drive Circuit"; IBM Tech. Discl. Bull.; vol. 17, No. 4, p. 1120; Sep. 1974.