Title: Circuit for demodulating a pulse width modulated signal

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Abstract: In a video tape recorder having a tape on which are recorded "0" and "1" binary coded bits of a pulse width modulated signal as for identifying frames of a video signal also recorded on the tape, the tape being advanced past a head detecting the pulse width modulated signal at speeds variable with the fast forward, normal and slow motion mode of operation of the recorder so as to change the bit frequency of the pulse width modulated signal in correspondence with the speed of the tape, a circuit which demodulates the "0" and "1" bits of the detected pulse width modulated signal by comparing the coded pulse width of each succeeding bit (B.sub.i +1) with the width of the preceeding bit (B.sub.i) to make the demodulation substantially independent of the bit frequency and the corresponding speed of the tape so that the circuit operates in each mode of recorder operation. In the preferred embodiment of the circuit, each bit is quantized into periodic pulses which correspond in number to the width of the bit. The number of pulses corresponding to the pulse widths of successive bits are then digitally compared in a comparator to obtain a two-level discrimination signal. More particularly, only selected higher value digits of the pulse numbers are compared to simplify the comparison and the comparator changes the level of the discrimination signal only during a preselected portion of each bit relative to the preceeding bit to assure accurate demodulation. The preferred circuit also has a circuit for deriving an edge pulse signal from the coded pulse width of each bit and a logic circuit operating on the edge pulse signal and the discrimination signal from the comparator for providing a signal corresponding only to bits of the one value, for example the "1" bits.


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