Title: Input phase modulation correction for charge-transfer-device analog shift registers

Abstract: A device for correcting charge-transfer inefficiency-induced distortion in charge-transfer-device analog shift registers. The shift register successively samples a data line of interest, a voltage reference source and a null input. A variable time-delayed, synchronous inverter provides a-c coupling of the register so as to avoid bias content effects, and cancels the "tail" or terminal data smear induced by the charge-coupled device, the delay or phase of which inverter is adjusted during response of the charge-coupled device to a sampled null input. Additional compensation of the shift register output is also provided for gain changes thereof.

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Inventors: Kephart, Gerald W. (Lakewood, CA, US)
White, Stanley A. (Yorba Linda, CA, US)

Application Number: 751633
Filing Date: 1976-12-17
Publication_date: 1979-01-23
Assignee: Rockwell International Corporation (El Segundo, CA)
Primary Class(es): 377/58 327/552, 377/59, 377/60, 377/78
Other Classes:
US Patent Ref:

3999171

Dec, 1976

Parsons

307/221.

Other Refs:
Primary Examiner: Zazworsky, John
Assistant Examiner:
Attorney: Humphries; L. Lee, Hamann; H. Fredrick, Pitts; Rolf M.