Title: Random access monostable memory cell having both static and dynamic operating modes

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Abstract: Memory cells in a random access memory system are addressed through associated X and Y address lines. Each memory cell is operable as a static memory device to represent "1" binary data in response to a first control potential applied to the associated X address line and a first data input potential applied to the associated Y address line and further operable as a nonstatic memory device to represent "0" binary data in response to the first control potential applied to the X address line and to a second data input potential applied to the Y address line. Means are provided to refresh the stored "0" binary data by simultaneously applying a second control potential lower than the first control potential to all of the X address lines at periodic intervals and simultaneously therewith applying the second data input potential to all of the Y address lines.


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