Home

Primary Examiner: Anagnos, Larry N.
Assistant Examiner:
Attorney: Woodward; Gail W.

Next ten patents ordered by date:

Chopper including transistor switches
Higher density insulated gate field effect circuit
Compliant MHD electrode structure
Electrical machinery
Dual position air gap baffle assembly for a dynamoelectric machine
Electromagnetic machines
Preassembleable brush assembly
Salient pole of a synchronous electric machine
Transducer assembly for megasonic cleaning
Internally supported flat tube display

Translate:
En
De
Es
Fr
It
Pt
Ja
Ko
Zh

Title: JFET base junction transistor clamp

Abstract: A base junction transistor inverter circuit will be driven into the saturation region if the drive current is large enough. In such circumstances, the collector voltage can go below the base voltage and approaches the emitter voltage. A circuit is provided to keep the transistor out of saturation and is comprised of a p-channel field effect transistor (JFET) connected between the base and collector of the junction transistor. The JFET is connected such that when the drive current increases and the junction transistor approaches saturation, the drive current is diverted through the JFET and into the substrate. The same clamp can be implemented by using a pnp junction transistor in combination with an n-channel JFET.

Do you think this is a good invention? Vote now:

Votes so far: For:(0) Against:(0)
Other info:

Inventors: Ochi, Sam S. (San Jose, CA, US)
Hamade, Adib R. (Cupertino, CA, US)
Culmer, Daniel D. (Sunnyvale, CA, US)

Application Number: 735879
Filing Date: 1976-10-22
Publication_date: 1978-10-03
Assignee: National Semiconductor Corporation (Santa Clara, CA)
Primary Class(es): 327/324
Other Classes:
US Patent Ref:

3160765	Dec, 1964	Krossa	307/300.
3482111	Dec, 1969	Gunderson et al.	307/300.
3534281	Oct, 1970	Hillhouse	307/300.
3621284	Nov, 1971	Cluett et al.	307/237.
3657577	Apr, 1972	Wakai et al.	307/300.
3665345	May, 1972	Dolby	307/237.
3763382	Oct, 1973	Horichi et al.	307/237.
3845405	Oct, 1974	Leidrich	307/300.
4013975	Mar, 1977	Kataoka et al.	307/237.

Other Refs: Other References: Hong et al., "Nonsaturating Logic Circuit", IBM Tech. Discl. Bull,; vol. 14, No. 5, pp. 1592, 10/1971.