Title: Self-protecting semiconductor device

Abstract: A self-protecting semiconductor device is provided wherein a region of localized increased avalanche multiplication factor is provided to insure that the maximum current density at the onset of avalanche voltage breakdown will occur in a known region. This current is utilized to turn-on the device in a controlled manner. In accordance with a presently preferred embodiment of this invention, the avalanche multiplication factor is increased by providing an etched down region in the gate region of the device, the etch extending at least into the depleted region proximate to the forward blocking semiconductor junction underlying the gate region of the device.

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Inventors: Temple, Victor A. K. (Elnora, NY, US)

Application Number: 669403
Filing Date: 1976-03-22
Publication_date: 1978-05-02
Assignee: General Electric Company (Schenectady, NY)
Primary Class(es): 257/111 257/157, 257/168, 257/173, 257/491, 257/E29.222
Other Classes:
US Patent Ref:

RE27440	Jul, 1972	De Cecco et al.	357/38.
3440501	Apr, 1969	Piccone et al.	357/38.
3486088	Dec, 1969	Gray et al.	357/38.
3590346	Jun, 1971	Bilo et al.	357/38.
3622845	Nov, 1971	McIntyre et al.	357/38.
3697833	Oct, 1972	Nakata	357/38.
3771029	Nov, 1973	Burtscher et al.	357/38.
3872493	Mar, 1975	Roberts et al.	357/38.
3893153	Jul, 1975	Page et al.	357/38.
3922774	Dec, 1975	Lindmayer et al.	357/30.
3987476	Oct, 1976	Sittig	357/30.

Other Refs:
Primary Examiner: Miller, Jr., Stanley D.
Assistant Examiner: Clawson, Jr., Joseph E.
Attorney: Kahler; Mark P., Cohen; Joseph T., Squillaro; Jerome C.