Title: Microcomputer apparatus

Abstract: A computer system features a processor unit which includes its own microprogram control unit. The microprogram control unit includes a storage means for operational instructions for the processor unit and means to issue those instructions in a desired sequence. A communication Bus provides communication channels between the processor unit and either data storage means or other processor units served by the Bus. The processor unit includes a number of clock controlled functional components as well as means for requesting access to the Bus. A clock signal generating means is controlled by signals from the microprogram control unit. When a request has been made for access to the Bus, the processor continues to operate until a point is reached when access to the Bus must be accomplished before continuing. The microprogram control unit issues a control signal which effectively stops the operation of the clock signal generating means until the Bus access routine has been accomplished. The clock signal generating means resumes operation when the access routine has been completed.

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Inventors: Handly, Robert J. (Phoenix, AZ, US)
Douglas, Robert H. (Phoenix, AZ, US)

Application Number: 689822
Filing Date: 1976-05-25
Publication_date: 1978-04-11
Assignee: Honeywell, Inc. (Minneapolis, MN)
Primary Class(es): 712/37 327/161, 327/299
Other Classes:
US Patent Ref:

3736567	May, 1973	Lotan et al.	340/172.
3740722	Jun, 1973	Greenberg et al.	340/172.
3914711	Oct, 1975	Carlson et al.	331/108.

Other Refs:
Primary Examiner: Zache, Raulfe B.
Assistant Examiner:
Attorney: Marhoefer; L. J., Burton; L. D.