Title: Apparatus for verifying the integrity of information stored in a data processing system memory

Abstract: A memory having a plurality of word locations, each having a bit location, includes a parity word in one of the word locations. Bit selector means selects a column of bits made up of like positioned bits in each of the word locations. All bits in a column are added together to indicate whether there is a successful parity check. Each such column is successively checked thereby verifying the integrity of the stored information on a column basis.

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Inventors: Cassarino, Jr., Frank V. (Weston, MA, US)
Holtey, Thomas O. (Newton Lower Falls, MA, US)
Riikonen, Douglas L. (Westford, MA, US)

Application Number: 643453
Filing Date: 1975-12-22
Publication_date: 1977-07-26
Assignee: Honeywell Information Systems, Inc. (Waltham, MA)
Primary Class(es): 714/805
Other Classes:
US Patent Ref:

3242461	Mar, 1966	Silberg et al.	340/146.
3519988	Jul, 1970	Grossman	340/146.
3569934	Mar, 1971	Par, Jr.	340/146.
3831144	Aug, 1974	En	340/146.
3876978	Apr, 1975	Bossen et al.	235/153.
3887901	Jun, 1975	Moore	340/146.

Other Refs:
Primary Examiner: Atkinson, Charles E.
Assistant Examiner:
Attorney: Solakian; John S., Reiling; Ronald T.