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Primary Examiner: Heyman, John S.
Assistant Examiner:
Attorney: Lackenbach, Lilling & Siegel

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Title: Field effect transistor information transfer circuit for use in storage register

Abstract: An output device of a metal-insulator-semiconductor transistor integrated circuit comprises, according to the invention, a penultimate stage, an output transistor, a clock pulse terminal and a separation pulse terminal. The penultimate stage incorporates a first transistor for charging the gate capacitance of the output transistor, a second transistor for discharging the gate capacitance of the output transistor, and a repeater whose input serves as an input of the output device, the output is connected to the drain of the first transistor, and the terminal for gating information from the output of the repeater is connected to the clock pulse terminal. The device of the invention makes it possible to reduce power consumption, cut production costs and decrease the size of electronic computers wherein it is used.


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Inventors: Tayakin, Jury Vasilievich (ULIT, SA)
Sidorenko, Vladimir Pavlovich (ULIT, SA)
Sirota, Alexandr Yakovlevich (ULIT, SA)
Prokofiev, Jury Vladimirovich (ULIT, SA)
Kopytov, Alexandr Maximovich (ULIT, SA)

Application Number: 634528
Filing Date: 1975-11-24
Publication_date: 1977-07-05
Assignee:
Primary Class(es): 377/74 326/95, 377/111
Other Classes:
US Patent Ref:
3506851Apr, 1970Polkinghorn et al.307/251.
3514765May, 1970Christensen307/279.
3648065Mar, 1972Hoffman307/221.

Other Refs: Other References: IBM Tech. Bul. vol. 17, No. 7 12/1974, p. 1989, "Dynamic Logic Driver," by Long et al.