Title: Dividing metal plated semiconductor wafers

Abstract: A process for fabricating semiconductor devices is disclosed. In particular, a method for separating semiconductor wafers into device chips includes the step of forming a photoresist grid pattern underlying the metallization layer on the back face of the wafer. Mechanical means, such as scribing or sawing, are used to penetrate the metal layer, the underlying photoresist layer, and at least a portion of the semiconductor body. Separation then is completed either by breaking, further sawing or etching. The process enables a clean separation to be made through fairly heavy gold or gold alloy coatings which is particularly advantageous for devices which are to be eutectic-bonded to mounting platforms.

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Inventors: Fair, Richard Barton (Sinking Spring, PA, US)
Hayes, John Saylor (Fleetwood, PA, US)
Rosser, William Morgan (Sweet Valley, PA, US)

Application Number: 617036
Filing Date: 1975-09-26
Publication_date: 1977-07-05
Assignee: Bell Telephone Laboratories, Incorporated (Murray Hill, NJ)
Primary Class(es): 438/465 225/2, 257/E21.238, 257/E21.599, 438/462, 438/656
Other Classes:
US Patent Ref:

2784479	Mar, 1957	Roberts	29/583.
2814853	Dec, 1957	Paskell	29/583.
3720997	Mar, 1973	Black	29/583.
3934331	Jan, 1976	Sugiyama	29/583.

Other Refs:
Primary Examiner: Tupman, W.
Assistant Examiner:
Attorney: Lockhart; H. W.