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Primary Examiner: Atkinson, Charles E.
Assistant Examiner:
Attorney: Kozak; Alfred W., Cass; Nathan, Peterson; Kevin R.

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Title: Memory modification system

Abstract: A system for modifying the output of individual bits of a fixed memory such as a ROM. Means are provided for recognizing the address of bit-locations requiring modification. The recognized addresses are organized into (a) those requiring the addition of a logic 1 bit or (b) those requiring deletion of a logic 1 bit. An output-data control package combines this information logically with the data bit existing in memory to provide a corrected data output bit on the required line of the ROM output bus. The system is also adaptable to "Word-oriented" ROM's such that an improper word in memory may be modified to provide a corrected output word from the ROM.

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Other info:

Inventors: Epstein, Jeffrey Earl (Laverne, CA, US)
Ruby, Gary Victor (Pasadena, CA, US)

Application Number: 660519
Filing Date: 1976-02-23
Publication_date: 1977-06-28
Assignee: Burroughs Corporation (Detroit, MI)
Primary Class(es): 714/746 365/103, 365/200
Other Classes:
US Patent Ref:

3422402	Jan, 1969	Sakalay	340/173.
3588830	Jun, 1971	Duda et al.	340/172.
3659275	Apr, 1972	Marshall	340/172.
3753244	Aug, 1974	Sumilas et al.	340/172.
3768071	Oct, 1973	Knauft et al.	235/153.
3898443	Aug, 1975	Smith	235/153.
3934227	Jan, 1976	Worst	340/172.

Other Refs: Other References: Houdek, Read-Only Patch Card, IBM Tech. Disclosure Bulletin, vol. 17, No. 6, Nov. 1974, pp. 1742-1743.