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Title: Filter with a reduced number of shift register taps

Abstract: Disclosed is a discrete-time filter configuration employing a shift register having output taps at only preselected stages for developing an output signal that is responsive to the signal of each stage of a shift register. The desired output signal is computed in a filter processing network by multiplying each of the output taps signals by a plurality of filter coefficients, by appropriately delaying the multiplied signals and by summing the delayed signals to produce the desired output signal.


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Inventors: Gersho, Allen (Berkeley Heights, NJ, US)

Application Number: 605073
Filing Date: 1975-08-15
Publication_date: 1977-03-15
Assignee: Bell Telephone Laboratories, Incorporated (Murray Hill, NJ)
Primary Class(es): 708/319 327/552, 333/166, 375/230
Other Classes:
US Patent Ref:
3105197Sep, 1963Aiken333/70.
3521041Jul, 1970Van Blerkom et al.235/156.
3573623Apr, 1971Bannon et al.325/42.
R27047Feb, 1971Lucky325/42.

Other Refs:
Primary Examiner: Ruggiero, Joseph F.
Assistant Examiner:
Attorney: Logan; H. L., Cubert; J. S.