Title: Time division conference circuit

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Abstract: A conference circuit is disclosed for use in a time division switching system which has an incoming and an outgoing time division bus connected by a summing amplifier. During a conference call, a different group of conferee stations is connected to the incoming and outgoing buses by the switching system controller in each of a plurality of time slots dedicated to that call. Output signals from the connected stations are then applied to the incoming bus. The conference circuit is connected to the incoming and outgoing buses and includes storage and transfer circuitry. In each conference time slot, the storage circuitry stores the output signals generated by conferee stations connected during that time slot. Signals from conferee stations which were stored by the storage circuitry during previous time slot are combined by a combining means and the resulting sum is placed on the incoming bus. All signals on the incoming bus are then summed by the summing amplifier and the composite distributed to the conferee stations via the outgoing bus. The storage circuitry has further apparatus which develops a signal for storage equal to the output signal generated by the connected conferee stations by subtracting from the composite signal on the outgoing bus the contributions due to signals stored in previous time slots.


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