Title: Fail safe logic monitor

Abstract: A fail safe logic monitor wherein a multi-bit logic word is multiplexed into a comparator and compared thereby with a multiplexed "hard wired" reference word. The comparator provides an output compatible with conventional a.c. fail safe fault logic. Features of the invention include self monitoring any single internal failure for indicating a fault while the monitor is on line and automatic test ability and compatibility with existing fault logic.

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Other info:

Inventors: Rock, Michael H. (Glen Rock, NJ, US)

Application Number: 559346
Filing Date: 1975-03-17
Publication_date: 1976-09-28
Assignee: The Bendix Corporation (Teterboro, NJ)
Primary Class(es): 714/761 340/146.2
Other Classes:
US Patent Ref:

3688099	Aug, 1972	Buscher	244/77.
3784980	Jan, 1974	Geesen	340/146.
3892923	Jul, 1975	Ranner	179/15.

Other Refs:
Primary Examiner: Robinson, Thomas A.
Assistant Examiner:
Attorney: Cuoco; Anthony F.