Title: Process of producing semiconductor device

Abstract: An SiO.sub.2 film doped with an impurity is formed on at least one portion of a surface of a semiconductor wafer. The wafer is selectively etched after a protective film for selective etching is disposed into a predetermined pattern on the SiO.sub.2 film. The impurity included in the SiO.sub.2 film can be diffused into the wafer to form a PN junction in the latter. Then the wafer is selectively etched until that surface of the wafer to which the PN junction is exposed is bevelled.

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Inventors: Takamiya, Saburo (Amagasaki, JA)
Hama, Masaharu (Amagasaki, JA)
Kondo, Akihiro (Amagasaki, JA)

Application Number: 510912
Filing Date: 1974-10-01
Publication_date: 1976-09-14
Assignee: Mitsubishi Denki Kabushiki Kaisha (JA)
Primary Class(es): 438/563 257/618, 257/E21.149, 257/E21.219, 257/E21.231, 257/E29.022, 438/701, 438/702, 438/739, 438/743, 438/978
Other Classes:
US Patent Ref:

2975080	Mar, 1961	Armstrong	148/188.
3179860	Apr, 1965	Clark et al.	156/17.
3575644	Apr, 1971	Huth	156/17.
3669775	Jun, 1972	Porter	156/17.
3713913	Jan, 1973	Wolfle et al.	148/187.
3767485	Oct, 1973	Sahagun	148/188.
3769109	Oct, 1973	MacRae	156/3.
3825454	Jul, 1974	Kikuchi et al.	156/17.
3842490	Oct, 1974	Seales	29/580.

Other Refs:
Primary Examiner: Powell, William A.
Assistant Examiner: Leitten, Brian J.
Attorney: Burns; Robert E., Lobato; Emmanuel J., Adams; Bruce L.