Title: System for automatic synchronization of blocks transmitting a series of bits

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Abstract: System for transmitting a series of bits with an indefinite length by transmitting and receiving between two stations parts of the series in balanced blocks and maintaining automatic synchronization of said blocks by generation of two types of similar framing blocks recognizable by a special signal in a fixed place in each framing block. These framing blocks also include the code number of the channel then to be transmitted. One type of framing block is generated when a loss of phase is detected in said bits at one station, which one type of framing block is continuously transmitted to the other station whereupon receipt thereof causes the generation of the other type of framing block at the other station. This other type of framing block then is continuously transmitted back to said one station, until it is detected at said one station indicating that reframing or synchronization has occurred, so traffic or information blocks can be and are resent again from said one station. Similarly, upon receipt of information blocks again at the other station from said one station, said other station restarts transmission of its information blocks.


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