Title: Computer memory addressing employing base and index registers

Abstract: A memory addressing system which enables a computer to address a total of 048,575 words (32 times its original capacity) with minimal impact upon existing software. The method employed by this invention involves a new dual usage of the b (index) designator in each instruction word so that in addition to its normal function of specifying which of 8 index registers is to be added to the address portion of the instruction, it also specifies which of 8 base registers is to be arithmetically added to the basic 15-bit address to determine the final 20-bit absolute memory location address. A total of 262,144 words may be accessed by this dual use of the b designator for any one setting of the base registers. Each program module is designed to operate in a 32,768 word environment and no coding changes need be made to it; the computer operator need only maintain the appropriate offset values in the base registers for the module currently in operation.

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Inventors: Crabb, Robert P. (San Diego, CA, US)
Unger, Robert A. (El Cajon, CA, US)
Gilbreath, Jim A. (San Diego, CA, US)

Application Number: 531016
Filing Date: 1974-12-09
Publication_date: 1976-04-06
Assignee: The United States of America as represented by the Secretary of the Navy (Washington, DC)
Primary Class(es): 711/220
Other Classes:
US Patent Ref:

3287703	Nov, 1966	Slotnick	340/172.
3389380	Jun, 1968	Ashbaugh	340/172.
3401376	Sep, 1968	Barnes	340/172.
3461434	Aug, 1969	Barton	340/172.
3657705	Apr, 1972	Mekot, Jr.	340/172.
3699528	Oct, 1972	Carlson	340/172.
3787813	Jan, 1974	Cole	340/172.

Other Refs:
Primary Examiner: Zache, Raulfe B.
Assistant Examiner: Thomas, James D.
Attorney: Sciascia; Richard S., Johnston; Ervin F., Stan; John