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Primary Examiner: Miller, Jr., Stanley D.
Assistant Examiner: Anagnos, L. N.
Attorney: Weiss; Harry M., Hoffman; Charles R.

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Title: CMOS synchronous binary counter

Abstract: A multi-state CMOS synchronous binary counter is implemented utilizing a CMOS transmission gate look-ahead carry circuit requiring only a fraction of the area required for AND or NAND gate carry structures.


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Inventors: Beutler, Robert Russel (Tempe, AZ, US)

Application Number: 493575
Filing Date: 1974-08-01
Publication_date: 1976-03-09
Assignee: Motorola, Inc. (Chicago, IL)
Primary Class(es): 377/117 326/113, 326/121
Other Classes:
US Patent Ref:
2853238Sep, 1958Johnson307/225.
3548319Dec, 1970Price307/224.
3631350Dec, 1971Drake328/42.
3679913Jul, 1972Foltz307/225.
3784918Jan, 1974Fassbender328/51.

Other Refs: Other References: wenniger, "Speed Your Multi-Stage Counter Designs"; Electronic Design; 8/15/1968; pp. 212-216.