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Title: Semiconductor integrated circuit and method of manufacture

Abstract: An integrated circuit has semiconductor devices on a substrate. The devices each have gates of polycrystalline silicon and the devices are insulated from each other by a stopper diffused into the substrate between said devices at least in the regions adjacent said gates. Reliability of the integrated circuit is improved by having each polycrystalline silicon gate formed with a region adjacent said stopper diffused with impurity of the same polarity as the impurity diffused in said stopper.


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Inventors: Sano, Tadashi (Suwa, JA)

Application Number: 432116
Filing Date: 1974-01-09
Publication_date: 1976-02-10
Assignee: Kabushiki Kaisha Seikosha (Tokyo, JA)
Primary Class(es): 257/400 257/E29.136, 257/E29.154
Other Classes:
US Patent Ref:
3711753Jan, 1973Brand et al.357/59.

Other Refs:
Primary Examiner: Lynch, Michael J.
Assistant Examiner: Wojciechowicz, E.
Attorney: Blum, Moscovitz, Friedman & Kaplan