Title: A-C signal multiplying circuit by a ratio of whole numbers the numerator of which is greater than one and greater than the denominator

Abstract: A digital frequency correlator circuit for comparing the frequencies of a urality of a-c signals to determine if they are coherent within a predetermined number of cycles. The a-c signals are converted into digital numbers representing their frequencies. The digital numbers are subtracted and the difference is compared, utilizing an exclusive-or circuit, with a predetermined number of cycles. If the difference is greater than the predetermined number of cycles, a logic 0 is outputted. If the difference is equal to or less than the predetermined number of cycles, a logic 1 is outputted.

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Inventors: Linder, John L. (Las Cruces, NM, US)

Application Number: 516540
Filing Date: 1974-10-21
Publication_date: 1976-01-27
Assignee: The United States of America as represented by the Secretary of the Navy (Washington, DC)
Primary Class(es): 377/48 327/3, 327/40, 327/356, 377/39
Other Classes:
US Patent Ref:

3673391	Jun, 1972	Lougheed	328/38.
3753125	Aug, 1973	Ishikawa et al.	328/38.
3769597	Oct, 1973	Mayer	307/220.
3835396	Sep, 1974	Demos et al.	328/38.

Other Refs:
Primary Examiner: Miller, Jr., Stanley D.
Assistant Examiner: Anagnos, L. N.
Attorney: Sciascia; Richard S., St.Amand; Joseph M., Hollis; Darrell E.