Title: Interprocessor communication apparatus for a data processing system

Abstract: In a data processing system having independently operating asynchronous processors, apparatus is disclosed which provides for interprocessor synchronization and/or information exchange. Synchronization interlocks and controls are provided for both identifying shared resources of a control processor and an input/output controller (IOC) processor and for obtaining control over these shared resources. If a conflict situation for any one of the shared resources arises, apparatus is disclosed whereby the IOC processor is provided the capability of assuming control over the shared resource even though the central processor has control over it. One of the shared resources is an interprocessor communication register which allows communication of control information between both the central processor and the IOC processor and from the central processor to the peripheral processor over a shared bus.

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Inventors: Curley, John L. (Sudbury, MA, US)
Richard, Roger R. (Chelmsford, MA, US)

Application Number: 463946
Filing Date: 1974-04-25
Publication_date: 1976-01-20
Assignee: Honeywell Information Systems, Inc. (Phoenix, AZ)
Primary Class(es): 711/150 709/226
Other Classes:
US Patent Ref:

3406380	Oct, 1968	Bradley et al.	340/172.
3593300	Jul, 1971	Driscol, Jr.	340/172.
3611306	Oct, 1971	Reigel et al.	340/172.
3648252	Mar, 1972	Thron et al.	340/172.
3654617	Apr, 1972	Irwin	340/172.
3676860	Jul, 1972	Collier et al.	340/172.
3702462	Nov, 1972	England	340/172.
3787816	Jan, 1974	Hauck et al.	340/172.
3812463	May, 1974	Lahti et al.	340/172.
3821709	Jun, 1974	Curley et al.	340/172.

Other Refs:
Primary Examiner: Shaw, Gareth D.
Assistant Examiner: Vandenburg, John P.
Attorney: Reiling; R. T., Frank; D. A.