Title: Multi-frequency signal receiving circuit

Abstract: A multi-frequency signal receiving circuit comprising a check circuit for discriminating the existence of a predetermined number of signal frequencies constituting a signal to produce an output, a timing circuit for delaying the output of the check circuit, a rectifying circuit for receiving the signal to detect the received signal energy and produce an output, a timing circuit for delaying the output of the rectifying circuit, an AND gate circuit for receiving the outputs of the two timing circuits to produce an output, and control means for controlling the transmission of the signal to the output circuit of the receiving circuit in accordance with the output of the AND gate circuit, whereby the normal operation of the receiving circuit can be ensured even when the signal frequencies arrive with a large arriving time difference and the operation start time is quickened.

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Inventors: Kusano, Goro (Fujisawa, JA)
Kosugi, Hiroshi (Yokohama, JA)
Yamamura, Yasuhiro (Yokohama, JA)

Application Number: 355276
Filing Date: 1973-04-27
Publication_date: 1976-01-20
Assignee: Hitachi, Ltd. (JA)
Primary Class(es): 340/825.73
Other Classes:
US Patent Ref:

3128349	Apr, 1964	Boesch	179/84.
3140357	Jul, 1964	Bischof et al.	179/84.
3288940	Nov, 1966	Bennett et al.	179/84.
3582562	Jun, 1971	Sellari	179/18.
3686440	Aug, 1972	Kroeger	179/5.
3875347	Apr, 1975	Alaily	179/84.

Other Refs:
Primary Examiner: Claffy, Kathleen H.
Assistant Examiner: Popek, Joseph
Attorney: Craig & Antonelli