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Primary Examiner: Rutledge, L. Dewayne
Assistant Examiner: Davis, J. M.
Attorney: Weiss; Harry M.

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Title: Semiconductor diffusion process

Abstract: This disclosure is directed to a semiconductor diffusion process for diffusing impurities into a semiconductor substrate. Open tube phosphorous diffusion process conditions are described wherein diffused region depth control is achieved by the initial deposition time. This permits creation of a diffused region having the benefits of low sheet resistance and shallow depth. Additionally, the diffusion process enables the formation of very thick thermal oxide layers which are particularly useful in MOS or FET device fabrication.

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Inventors: Brown, William A. (Wappingers Falls, NY, US)

Application Number: 084276
Filing Date: 1970-10-27
Publication_date: 1976-01-13
Assignee: Cogar Corporation (Utica, NY)
Primary Class(es): 438/563 438/565, 438/770, 438/783, 438/920
Other Classes:
US Patent Ref:

3365794	Jan, 1968	Botka	148/187.
3398029	Aug, 1968	Yasufuku et al.	148/187.
3442725	May, 1969	Huffman et al.	148/189.
3474310	Oct, 1969	Ono et al.	148/186.

Other Refs: Other References: "Integrated Circuits," Warner, Jr., (Ed.), McGraw Hill Book Co., N.Y., 1965, pp. 289-290, 304-305.